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List of articles in category MTech VLSI Projects
Title
A Fixed-Point Squaring Algorithm Using an Implicit Arbitrary Radix Number System - 2016
An Improved Design of a Reversible Fault Tolerant LUT-Based FPGA - 2016
An Improved Signed Digit Representation Approach for Constant Vector Multiplication - 2016
Area-Delay Efficient Digit-Serial Multiplier Based on kPartitioning Scheme Combined With TMVP Block Recombination Approach - 2016
Area-Delay-Power-Aware Adder Placement Method for RNS Reverse Converter Design - 2016
Efficient Implementation of Scan Register Insertion on Integer Arithmetic Cores for FPGAs - 2016
Logic Synthesis in Reversible PLA - 2016
MAC Unit for Reconfigurable Systems Using Multi- Operand Adders with Double Carry-Save Encoding - 2016
Multi Precision Arithmetic Adders - 2016
Weighted Partitioning for Fast Multiplier-less Multiple Constant Convolution Circuit - 2016
High-Speed and Energy-Efficient Carry Skip Adder Operating Under a Wide Range of Supply Voltage Levels - 2016
Low complexity and area efficient reconfigurable multimode inter leaver address generator for multi standard radios - 2016
Efficient implementation of bit-parallel fault tolerant polynomial basis multiplication and squaring over GF(2m) - 2016
Measuring Improvement When Using HUB Formats to Implement Floating-Point Systems Under Round-to-Nearest - 2016
Flexible DSP Accelerator Architecture Exploiting Carry-Save Arithmetic - 2016
A Modified Partial Product Generator for Redundant Binary Multipliers - 2016
Arithmetic algorithms for extended precisionusing floating-point expansions - 2016
Pre-Encoded Multipliers Based on Non-Redundant Radix-4 Signed-Digit Encoding - 2016
Performance/Power Space Exploration for Binary64 Division Units - 2016
On Efficient Retiming of Fixed-Point Circuits - 2016

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