PROJECT TITLE :
Design, Evaluation and Application of Approximate High-Radix Dividers - 2018
Approximate high radix dividers (HR-AXDs) are proposed and investigated during this paper. High-radix division is reviewed and inexact computing is introduced at completely different levels. Style parameters like number of bits (N) and radix (r) are considered in the analysis; the replacement of actual cells with inexact cells in a binary signed-digit adder is introduced by utilizing totally different replacement schemes. Cell truncation and error compensation also are proposed to further extend inexact computation. Circuit-level performance and also the error characteristics of the inexact high radix dividers are analyzed for the proposed styles. The combined assessment of the normal error distance, power dissipation, and delay is investigated and applications of approximate high-radix dividers are treated in detail. The simulation results show that the proposed approximate dividers supply intensive saving in terms of power dissipation, circuit complexity, and delay, whereas only incurring in a very small degradation in accuracy thus creating them possibly suitable and interesting to some applications and domains like low power/mobile computing.
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