Towards Efficient Modular Adders based on Reversible Circuits - 2018


Reversible logic is a computing paradigm that has attracted significant attention lately due to its properties that cause ultra-low power and reliable circuits. Reversible circuits are fundamental, as an example, for quantum computing. Since addition could be a basic operation, planning efficient adders is a cornerstone in the research of reversible circuits. Residue Number Systems (RNS) has been as a powerful tool to provide parallel and fault-tolerant implementations of computations where additions and multiplications are dominant. During this paper, for the primary time in the literature, we have a tendency to propose the mix of RNS and reversible logic. The parallelism of RNS is leveraged to increase the performance of reversible computational circuits. Being the most elementary part in any RNS, during this work we tend to propose the implementation of modular adders, particularly modulo 2n-1 adders, using reversible logic. Analysis and comparison with traditional logic show that modulo adders can be designed using reversible gates with minimum overhead as compared to regular reversible adders.

Did you like this research project?

To get this research project Guidelines, Training and Code... Click Here

PROJECT TITLE :Efficient Secure Outsourcing of Large-Scale Sparse Linear Systems of Equations - 2018ABSTRACT:Solving large-scale sparse linear systems of equations (SLSEs) is one in all the foremost common and basic problems in
PROJECT TITLE :Distributed Feature Selection for Efficient Economic Big Data Analysis - 2018ABSTRACT:With the rapidly increasing popularity of economic activities, a large amount of economic data is being collected. Although
PROJECT TITLE :Efficient Wideband DOA Estimation Through Function Evaluation Techniques - 2018ABSTRACT:This Project presents an economical analysis methodology for the functions involved within the computation of direction-of-arrival
PROJECT TITLE :Efficient System Tracking With Decomposable Graph-Structured Inputs and Application to Adaptive Equalization With Cyclostationary Inputs - 2018ABSTRACT:This Project introduces the graph-structured recursive least
PROJECT TITLE :Efficient Partial-Sum Network Architectures for List Successive-Cancellation Decoding of Polar Codes - 2018ABSTRACT:List successive cancellation decoder (LSCD) architectures have been recently proposed for the decoding

Ready to Complete Your Academic MTech Project Work In Affordable Price ?

Project Enquiry