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VLSI HSPICE MTech Projects

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No Project Titles Abstract
1 . 10T SRAM Using Half-VDD Precharge and Row-Wise Dynamically Powered Read Port for Low Switching Power and Ultralow RBL Leakage - 2017 Abstract
2 . Ultra-Low Power, Highly Reliable, and Nonvolatile Hybrid MTJ/CMOS Based Full-Adder for Future VLSI Design - 2017 Abstract
3 . Sense Amplifier Half-Buffer (SAHB): A Low-Power High-Performance Asynchronous Logic QDI Cell Template - 2017 Abstract
4 . Register – Less NULL Conventional Logic - 2017 Abstract
5 . Probability-Driven Multibit Flip-Flop Integration With Clock Gating - 2017 Abstract
6 . Optimized Memristor-Based Multipliers - 2017 Abstract
7 . Exploiting Transistor-Level Reconfiguration to Optimize Combinational circuits - 2017 Abstract
8 . Design of Defect and Fault-Tolerant Nonvolatile Spintronic Flip-Flops - 2017 Abstract
9 . High-performance engineered gate transistor-based compact digital circuits - 2017 Abstract
10 . High Performance Ternary Adder using CNTFET - 2017 Abstract
11 . Energy-Efficient TCAM Search Engine Design Using Priority-Decision in Memory Technology - 2017 Abstract
12 . Design of Low Power, High Performance 2-4 and 4-16 Mixed-Logic Line Decoders - 2017 Abstract
13 . Design and Low Power Magnitude Comparator - 2017 Abstract
14 . Bias-Induced Healing of Vmin Failures in Advanced SRAM Arrays - 2017 Abstract
15 . Area and Energy-Efficient Complementary Dual-Modular Redundancy Dynamic Memory for Space Applications - 2017 Abstract
16 . A Memristor Based Binary Multiplier - 2017 Abstract
17 . A Synthesis Methodology for Ternary Logic Circuits in Emerging Device Technologies - 2017 Abstract
18 . A Mapping Methodology of Boolean Logic Circuits on Memristor Crossbar - 2017 Abstract
19 . Delay Analysis for Current Mode Threshold Logic Gate Designs - 2017 Abstract
20 . A High-Speed and Power-Efficient Voltage Level Shifter for Dual-Supply Applications - 2017 Abstract
21 . A 1.8V CMOS Chopper Four-Quadrant Analog Multiplier - 2017 Abstract
22 . Binary Adder Circuit Design Using Emerging MIGFET Devices - 2017 Abstract
23 . CMCS: Current-Mode Clock Synthesis - 2017 Abstract
24 . A Compact memristor-CMOS hybrid Look-up-table Design and Potential Application in FPGA - 2017 Abstract
25 . 28-nm Latch-Type Sense Amplifier Modification for Coupling Suppression - 2017 Abstract

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