VLSI Communication MTech Projects

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No Project Titles Abstract
1 . Design and simulation of CRC encoder and decoder using VHDL - 2018 Abstract
2 . Reconfigurable Decoder for LDPC and Polar Codes - 2018 Abstract
3 . Low-Power Noise-Immune Nano scale Circuit Design Using Coding-Based Partial MRF Method - 2018 Abstract
4 . An Efficient VLSI Architecture for Convolution Based DWT Using MAC - 2018 Abstract
5 . Basic-Set Trellis Min–Max Decoder Architecture for Non binary LDPC Codes With High-Order Galois Fields - 2018 Abstract
6 . Double Error Cellular Automata-Based Error Correction with Skip-mode Compact Syndrome Coding for Resilient PUF Design - 2018 Abstract
7 . Extending 3-bit Burst Error-Correction Codes With Quadruple Adjacent Error Correction - 2018 Abstract
8 . Efficient Implementations of 4-Bit Burst Error Correction for Memories - 2018 Abstract
9 . A Single and Adjacent Error Correction Code for Fast Decoding of Critical Bits - 2018 Abstract
10 . Improving Error Correction Codes for Multiple-Cell Upsets in Space Applications - 2018 Abstract

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