PROJECT TITLE :
Low Power 4-Bit Arithmetic Logic Unit Using Full-Swing GDI Technique - 2018
Power dissipation and area of the circuit are the main problems in the electronics industry, this paper provides a design of four-Bit Arithmetic Logic Unit (ALU) using Full-Swing GDI Technique, which thought of a good technique for low power digital style whereas reducing the realm of the circuit compared to alternative logic designs. The proposed ALU style consists of two×one Multiplexer, four×1 Multiplexer and low power Full Adder cell to appreciate the arithmetic and logic operations. The simulation applied using Cadence Virtuoso using 65nm TSMC method. The results show that the proposed style consume less power using less number of transistors, whereas achieving full swing operation compared to previous work.
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