PROJECT TITLE :

Exploration of Approximate Multipliers Design Space using Carry Propagation Free Compressors - 2018

ABSTRACT:

Many rising application domains, like machine learning, can tolerate restricted amounts of arithmetic inaccuracy. When planning custom compute accelerators for these domains, hardware designers will explore tradeoffs that sacrifice accuracy so as to cut back area, delay, and/or power consumption. This paper explores the planning house of approximate multipliers employing a family of approximate compressors as building blocks for the partial product reduction tree. We tend to gift a tool that permits the user to specify an allowable level of error tolerance, and returns the minimum area, delay, or power approximate multiplier that provides that level of accuracy. Our experimental results indicate that our proposed compressors generate a lot of correct and more economical approximate multipliers than existing state-of-the-art techniques.


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