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PROJECT TITLE :

A 32-bit 4×4 Bit-Slice RSFQ Matrix Multiplier - 2018

ABSTRACT:

A thirty two-bit 4 × four bit-slice fast single-flux-quantum (RSFQ) matrix multiplier is proposed. The multiplier mainly consists of bit-slice multipliers and bit-slice adders. The multiplication of unsigned integer matrices is implemented by control signals. The matrix multiplier used synchronous concurrent-flow clocking. The results show that a sixteen-bit bit-slice processing has the least latency at ten GHz.


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