FPGA Implementation of an Improved Watchdog Timer for Safety-critical Applications - 2018


Embedded systems that are used in safety-important applications need highest reliability. External watchdog timers are utilized in such systems to automatically handle and recover from operation time connected failures. Most of the obtainable external watchdog timers use additional circuitry to regulate their timeout periods and give only restricted features in terms of their functionality. This paper describes the architecture and design of an improved configurable watchdog timer which will be used in safety-vital applications. Many fault detection mechanisms are built into the watchdog, that adds to its robustness. The functionality and operations are rather general and it will be used to monitor the operations of any processor based mostly real-time system. This paper also discusses the implementation of the proposed watchdog timer in a Field Programmable Gate Array (FPGA). This permits the design to be easily adaptable to totally different applications, whereas reducing the general system price. The effectiveness of the proposed watchdog timer to detect and answer faults is initial studied by analysing the simulation results. The design is validated in an exceedingly real-time hardware by injecting faults through the software whereas the processor is executing, and conclusions are drawn.

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