High speed and low power preset-able modified TSPC D flip-flop design and performance comparison with TSPC D flip-flop - 2018


Positron emission tomography (PET) could be a nuclear functional imaging technique that produces a three-dimensional image of functional organs within the body. PET needs high resolution, quick and low power multichannel analog to digital converter (ADC). A typical multichannel ADC for PET scanner architecture consists of several blocks. Most of the blocks can be designed by using fast, low power D flip-flops. A preset-ready true single phase clocked (TSPC) D flip-flop shows various glitches (noise) at the output because of unnecessary toggling at the intermediate nodes. Preset-in a position modified TSPC (MTSPC) D flip-flop are proposed as another solution to alleviate this problem. However, the MTSPC D flip-flop needs one extra PMOS to suspend toggling of the intermediate nodes. In this work, we designed a seven-bit preset-able grey code counter by using the proposed D flip-flop. This work involves UMC a hundred and eighty nm CMOS technology for preset-in a position 7-bit grey code counter where we tend to achieved 1 GHz most operation frequency with most significant bit (MSB) delay zero.ninety six ns, power consumption 244.2 µW (micro watt) and power delay product (PDP) 0.twenty three pJ (Pico joule) from one.eight V power supply.

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