Parallel Pseudo-Exhaustive Testing of Array Multipliers with Data-Controlled Segmentation - 2018


This paper presents a brand new method for pseudo-exhaustive testing of standard array multipliers employing a novel approach of data-controlled segmentation of the circuit. The method covers both combinational and sequential fault classes. Differently from previous papers, the proposed separate cell-testing approach targets multiple faults in several cells and avoids fault masking. The strategy is additionally applicable to other multiplier architectures like Booth and MiniMIPS with high stuck-at fault (SAF) coverage. The regular structure of the test allows economical implementation of the method as each software primarily based self-check (SBST) and hardware-based BIST.

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