PROJECT TITLE :
A Droop Measurement Built-in Self-Test Circuit for Digital Low-Dropout Regulators - 2018
Today's highly integrated system-on-chips (SOCs) employ several integrated voltage regulators to realize higher power potency and smaller board space. Testing of voltage regulators is important to validate the ultimate product. In this work, we have a tendency to present a unique droop measurement designed-in self-take a look at (BIST) circuit for digital low-dropout regulators (DLDOs). The proposed BIST system is capable of storing transient droop data with but one.05 p.c error for droop voltages starting from 45 mV to 520 mV for nominal DLDO output voltage of 1.6 V where offer voltage is one.8 V. Additionally, a reuse primarily based ten-bit successive-approximation (SAR) analog-to-digital converter (ADC) is incorporated to generate a digital output cherish the stored droop data as the BIST measurement result. The on-chip DLDO decoupling capacitor (~one nF) is reconfigured as a charge scaling array for ADC operation throughout testing to increase reusability. The proposed BIST circuit is intended with 0.18 µm CMOS process in Cadence Virtuoso and verified with corner simulations.
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