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S.No Project Titles Abstract
126 Aging Aware Reliable Multiplier Design With Adaptive Hold Logic - 2014 Abstract
127 A Low Complexity Multiple Error Correcting Architecture Using Novel Cross Parity Codes Over GF(2m) - 2014 Abstract
128 A Look Ahead Clock Gating Based on Auto Gated Flip Flops - 2014 Abstract
129 Design of Dedicated Reversible Quantum Circuitry for Square Computation - 2014 Abstract
130 Low Power Test Generation by Merging of Functional Broadside Test Cubes - 2014 Abstract
131 Thwarting Scan Based Attacks on Secure-ICs With On-Chip Comparison - 2014 Abstract
132 Design of High Performance 64 bit MAC Unit - 2014 Abstract
133 Design for Testability Support for Launch and Capture Power Reduction in Launch Off Shift and Launch Off Capture Testing - 2014 Abstract
134 Low Complexity Low Latency Architecture for Matching of Data Encoded With Hard Systematic Error Correcting Codes - 2014 Abstract
135 Fast Radix 10 Multiplication Using Redundant BCD Codes - 2014 Abstract
136 High Speed Convolution and De convolution Algorithm - 2014 Abstract
137 Skewed Load Test Cubes Based on Functional Broadside Tests for a Low Power Test Set - 2014 Abstract
138 Test Versus Security Past and Present - 2014 Abstract
139 Area Delay Efficient Binary Adders in QCA - 2014 Abstract
140 A Combined SDC SDF Architecture for Normal I/O Pipelined Radix-2 FFT - 2015 Abstract
141 Design and FPGA implementation of compressor based Vedic multiplier - 2014 Abstract
142 Design and Estimation of delay power and area for Parallel prefix adders - 2014 Abstract
143 A Method to Extend Orthogonal Latin Square Codes - 2014 Abstract
144 Enhanced Memory Reliability Against Multiple Cell Upsets Using Decimal Matrix Code - 2014 Abstract
145 On the Systematic Creation of Faithfully Rounded Truncated Multipliers and Arrays - 2014 Abstract
146 Area Delay Power Efficient Carry Select Adder - 2014 Abstract
147 Design of Dedicated Reversible Quantum Circuitry for Square Computation Abstract
148 All Optical Reversible Multiplexer Design using Mach-Zehnder interferometer Abstract
149 Realization of 2:4 reversible decoder and its applications Abstract
150 parallel multiplier accumulator Based on radix-2 Modified Booth Algorithm by using a VLSI architecture Abstract

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