A Memristor Based Binary Multiplier - 2017 PROJECT TITLE :A Memristor Based Binary Multiplier - 2017ABSTRACT:Memristor may be a two-terminal nanodevice that has recently attracted the eye of the many researchers due to its simple structure, non-volatility behaviour, high-density integration, and low-power consumption. This paper presents and evaluates a novel binary multiplier composed of memristive devices and nanowire crossbar arrays. Using the proposed multiplier instead of usual digital circuits, the amount of digital gates are a significant challenge for implementing combinational logic in hybrid circuits will be reduced. The proposed memristor-based mostly multiplier needs 20 memristor devices and it performs multiplication with 8 computational steps. Did you like this research project? To get this research project Guidelines, Training and Code... Click Here facebook twitter google+ linkedin stumble pinterest VLSI HSPICE MTech Projects Area and Energy-Efficient Complementary Dual-Modular Redundancy Dynamic Memory for Space Applications - 2017 A Synthesis Methodology for Ternary Logic Circuits in Emerging Device Technologies - 2017