A Mapping Methodology of Boolean Logic Circuits on Memristor Crossbar - 2017 PROJECT TITLE :A Mapping Methodology of Boolean Logic Circuits on Memristor Crossbar - 2017ABSTRACT:Alternatives to CMOS logic circuit implementations are under analysis for future scaled electronics. Memristor crossbar-based mostly logic circuit is one in all the promising candidates to a minimum of partially replace CMOS technology, which is facing several challenges like reduced scalability, reliability, and performance gain. Memristor crossbar offers many blessings including scalability, high integration density, nonvolatility, etc. The state-of-the-art for memristor crossbar logic circuit style will only implement simple and tiny circuits. This paper proposes a mapping methodology of large Boolean logic circuits on memristor crossbar. Appropriate place-and-route schemes, to efficiently map the circuits on the crossbar, plus many optimization schemes also are proposed. To illustrate the potential of the methodology, a multibit adder and other 9 additional advanced benchmarks are studied; the delay, area and power consumption induced by both crossbar and its CMOS management half are evaluated. Did you like this research project? To get this research project Guidelines, Training and Code... Click Here facebook twitter google+ linkedin stumble pinterest VLSI HSPICE MTech Projects A Synthesis Methodology for Ternary Logic Circuits in Emerging Device Technologies - 2017 Delay Analysis for Current Mode Threshold Logic Gate Designs - 2017
