A Synthesis Methodology for Ternary Logic Circuits in Emerging Device Technologies - 2017


Automatic synthesis of digital circuits has played a key role in obtaining high-performance styles. Whereas considerable work has been done in the past, rising device technologies decision for a want to re-examine the synthesis approaches, so that better circuits that harness the true power of these technologies can be developed. This paper presents a methodology for synthesis applicable to devices that support ternary logic. We present an algorithm for synthesis that mixes a geometrical representation with unary operators of multivalued logic. The geometric illustration facilitates scanning appropriately to obtain easy sum-of-products expressions in terms of unary operators. An implementation based on Python is described. The power of the approach lies in its applicability to a large choice of circuits. The proposed approach ends up in the savings of 26percent and twenty two% in transistor-count, respectively, for a ternary full-adder and a ternary content-addressable memory (TCAM) over the simplest existing styles. Furthermore, the proposed approach requires, on an average, but tenpercent of the quantity of the transistors compared with a recent decoder-based mostly design for numerous ternary benchmark circuits. Extensive HSPICE simulation results show roughly ninety twop.c reduction in power-delay product (PDP) for a 12 ×twelve TCAM and sixtypercent reduction in PDP for a 24-ternary digit barrel shifter over recent styles.

Did you like this research project?

To get this research project Guidelines, Training and Code... Click Here

PROJECT TITLE :Symbolic Synthesis of Timed Models with Strict 2-Phase Fault Recovery - 2018ABSTRACT:In this article, we tend to concentrate on economical synthesis of fault-tolerant timed models from their fault-intolerant version.
PROJECT TITLE :Tap Delay-and-Accumulate Cost Aware Coefficient Synthesis Algorithm for the Design of Area-Power Efficient FIR Filters - 2018ABSTRACT:Finite-impulse response filters are widely used in digital signal processing
PROJECT TITLE :CMCS: Current-Mode Clock Synthesis - 2017ABSTRACT:In a very high-performance VLSI style, the clock network consumes a vital amount of power. Whereas most existing methodologies use voltage-mode (VM) signaling, these
PROJECT TITLE :Design And Synthesis Of Combinational Circuits Using Reversible Decoder In Xilinx - 2017ABSTRACT:Reversible logic is that the rising field for research in present era. The aim of this paper is to understand completely
PROJECT TITLE : An Analytical Model for Synthesis Distortion Estimation in 3D Video - 2014 ABSTRACT: We tend to propose an analytical model to estimate the synthesized view quality in 3D video. The model relates errors within

Ready to Complete Your Academic MTech Project Work In Affordable Price ?

Project Enquiry