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IEEE ROOT Projects at MTech Projects feature the latest project topics with Abstract, Source Code, Thesis, Report, Documentation, Research Paper Writing, Presentation ppt, Video demo, and Expert guidance for BTech, MTech, BE, ME, MS and PhD students. We support engineering students and researchers across Hyderabad, Bengaluru, Chennai, Mumbai, Delhi, Pune, Kolkata, Ahmedabad, Kochi and other major cities in India, USA, UK.

Latest ROOT IEEE Project Titles [2026]

S.No Project Title Abstract
321 A Cellular Network Architecture WithPolynomial Weight Functions - 2016 Abstract
322 A Novel Coding Scheme for Secure Communications in Distributed RFID Systems - 2016 Abstract
323 Enhanced Built-In Self-Repair Techniques for Improving Fabrication Yield and Reliability of Embedded Memories - 2016 Abstract
324 A Test Selection Procedure for Improving the Accuracy of Defect Diagnosis - 2016 Abstract
325 Design for Testability of Sleep Convention Logic - 2016 Abstract
326 Computing Seeds for LFSR-Based Test Generation From Non test Cubes - 2016 Abstract
327 Low-Cost and High-Reduction Approaches for Power Droop During Launch-On-Shift Scan-Based Logic BIST - 2016 Abstract
328 A Normal I/O Order Radix-2 FFT Architecture to Process Twin Data Streams for MIMO - 2016 Abstract
329 Low-Power Split-Radix FFT Processors Using Radix-2 Butterfly Units - 2016 Abstract
330 Efficiency Enablers of Lightweight SDR for MIMO Baseband Processing - 2016 Abstract
331 A High-Performance FIR Filter Architecture for Fixed and Reconfigurable Applications - 2016 Abstract
332 Hardware Architectural Support for Caching Partitioned Reconfigurations in Reconfigurable Systems - 2016 Abstract
333 A Mixed-Decimation MDF Architecturefor Radix-2k Parallel FFT - 2016 Abstract
334 A High-Speed FPGA Implementation of an RSD-Based ECC Processor - 2016 Abstract
335 A 0.52/1 V Fast Lock-in ADPLL for Supporting Dynamic Voltage and Frequency Scaling - 2016 Abstract
336 Code Compression for Embedded Systems Using Separated Dictionaries - 2016 Abstract
337 A Dynamically Reconfigurable Multi-ASIP Architecture for Multi-standard and Multimode Turbo Decoding - 2016 Abstract
338 Design and Implementation of High-Speed All-Pass Transformation-Based Variable Digital Filters by Breaking the Dependence of Operating Frequency on Filter Order - 2016 Abstract
339 Statistical Framework and Built-In Self Speed-Binning System for Speed Binning Using On-Chip Ring Oscillators - 2016 Abstract
340 A Low-Power Broad-Bandwidth Noise Cancellation VLSI Circuit Design for In-Ear Headphones - 2016 Abstract

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