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  4. A Mixed-Decimation MDF Architecturefor Radix-2k Parallel FFT - 2016
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Category: MTech VLSI Projects
By MTech Projects
MTech Projects
01.Jun
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A Mixed-Decimation MDF Architecturefor Radix-2k Parallel FFT - 2016

PROJECT TITLE :

A Mixed-Decimation MDF Architecturefor Radix-2k Parallel FFT - 2016

ABSTRACT:

This paper presents a mixed-decimation multipath delay feedback (M2 DF) approach for the radix-2k quick Fourier transform. We tend to employ the principle of folding transformation to derive the proposed design, that activates the idle amount of arithmetic modules in multipath delay feedback (MDF) architectures by integrating the decimation-in-time operations into the decimation-in-frequency-operated computing units. Furthermore, we have a tendency to compare the proposed design with different economical schemes, namely, the MDF and also the multipath delay commutator (MDC) theme theoretically and experimentally. Relying on the obtained expressions and statistics, it will be concluded that the M2DF design is an efficient various to the MDF theme, since it achieves improved potency in the employment of arithmetic resources while not deteriorating the superiorities of feedback structures. Moreover, the counseled design performs better in memory demand and computing delay compared with the MDC approach.

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  • ROOT
  • Decimation-In-Frequency (DIF)
  • Decimation-In-Time (DIT)
  • Multipath Delay Feedback (MDF)
Previous article: Hardware Architectural Support for Caching Partitioned Reconfigurations in Reconfigurable Systems - 2016 Hardware Architectural Support for Caching Partitioned Reconfigurations in Reconfigurable Systems - 2016 Next article: A High-Speed FPGA Implementation of an RSD-Based ECC Processor - 2016 A High-Speed FPGA Implementation of an RSD-Based ECC Processor - 2016
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