Multipliers-Driven Perturbation of Coefficients for Low-Power Operation in Reconfigurable FIR Filters - 2017 PROJECT TITLE :Multipliers-Driven Perturbation of Coefficients for Low-Power Operation in Reconfigurable FIR Filters - 2017ABSTRACT:Reconfigurable finite-impulse response (FIR) filters are one in every of the most widely implemented elements in Internet of Things systems that need flexibility to support many target applications while consuming the minimum amount of power to suits the strict design requirements of portable devices. Because of the numerous power consumption in the multiplier components of the FIR filter, various techniques aimed at reducing the switching activity of these multipliers have been proposed in the literature. However, these techniques rarely exploit the flexibleness on the algorithmic level, which can lead to extra benefits. In this paper, FIR filter multipliers are extensively characterized with power simulations, providing a strategy for the perturbation of the coefficients of baseline filters at the algorithm level to trade-off reduced power consumption for filter quality. The proposed optimization technique will not require any hardware overhead and it permits the possibility of scaling the facility consumption of the filter at runtime, while making certain the full baseline performance of any programmed filter whenever it is needed. The analyzed FIR filters were fabricated in an exceedingly 28nm FD-SOI test chip and measured at a near-threshold, 600mV provide voltage. For example, by rigorously choosing slightly perturbed coefficients in a very low-pass configuration, power savings of up to thirty threepercent are achieved when accepting a 3dB degradation on the stopband, as compared with the baseline implementation of the filter. Did you like this research project? To get this research project Guidelines, Training and Code... Click Here facebook twitter google+ linkedin stumble pinterest A Bit plane Decomposition Matrix Based VLSI Integer Transform Architecture for HEVC - 2017 Low Complexity and Critical Path based VLSI Architecture for LMS Adaptive Filter using Distributed Arithmetic - 2017