Low power compressor based MAC architecture for DSP applications - 2015 PROJECT TITLE: Low power compressor based MAC architecture for DSP applications - 2015 ABSTRACT: This project presents the low power compressor primarily based Multiply-Accumulate (MAC) design for DSP applications. In VLSI, highly computed arithmetic cells including adders and multipliers are the most copiously used elements. Efficient implementation of arithmetic logic units, floating point units and different dedicated purposeful parts are utilized in most of the microprocessors and digital signal processors (DSPs). Thus during this brief, compressor circuit has been illustrated for the low power applications and also the impact of datapath circuits has been demonstrated. The proposed low power compressor design was applied to MAC unit and compared against the conventional compressor based MAC units and observed that the proposed design has reduced vital quantity of leakage power. Did you like this research project? To get this research project Guidelines, Training and Code... Click Here facebook twitter google+ linkedin stumble pinterest Low power multiplier architectures using vedic mathematics in 45nm technology for high speed computing - 2015 Glitch free combinational clock gating approach in nanometer VLSI circuits - 2015
