A Ternary Unification Framework for Optimizing TCAM-Based Packet Classification Systems - 2018


Packet classification is that the key mechanism for enabling many networking and security services. Ternary content addressable memory (TCAM) has been the commercial customary for implementing high-speed packet classification because of its constant classification time. However, TCAM chips have small capability, high power consumption, high heat generation, and large space-size. This Project focuses on the TCAM-based mostly classifier compression drawback: given a classifier C , we have a tendency to need to construct the littlest potential list of TCAM entries T that implement C . In this Project, we tend to propose the ternary unification framework (TUF) for this compression downside and three concrete compression algorithms within this framework. The framework allows us to seek out a lot of optimization opportunities and style new TCAM-based classifier compression algorithms. Our experimental results show that the TUF will speed up the prior algorithm TCAM Razor by 20 times or additional and results in new algorithms that improve compression performance over previous algorithms by a mean of on our largest real-life classifiers. The experimental results show that our algorithms can improve both the runtime and also the compression ratio over previous work.

Did you like this research project?

To get this research project Guidelines, Training and Code... Click Here

PROJECT TITLE :Dynamically Updatable Ternary Segmented Aging Bloom Filter for OpenFlow-Compliant Low-Power Packet Processing - 2018ABSTRACT:OpenFlow, the most protocol for software-outlined networking, requires large-sized rule
PROJECT TITLE :High Performance Ternary Adder using CNTFET - 2017ABSTRACT:Ternary logic may be a promising alternative to the conventional binary logic in VLSI style because it provides the benefits of reduced interconnects, higher
PROJECT TITLE :A Synthesis Methodology for Ternary Logic Circuits in Emerging Device Technologies - 2017ABSTRACT:Automatic synthesis of digital circuits has played a key role in obtaining high-performance styles. Whereas considerable
PROJECT TITLE: Design and Performance Evaluation of A Low Transistor Ternary CNTFET SRAM Cell - 2015 ABSTRACT: Carbon Nanotube Field-Effect Transistor (CNTFET) has proved to be a promising different to conventional CMOS style
PROJECT TITLE: Design of high speed ternary full adder and threeinput XOR circuits using CNTFETs - 2015 ABSTRACT: This project proposes a new high speed ternary full adder (TFA) cell for carbon nano tube field effect transistor

Ready to Complete Your Academic MTech Project Work In Affordable Price ?

Project Enquiry