Design and Performance Evaluation of A Low Transistor Ternary CNTFET SRAM Cell - 2015


Carbon Nanotube Field-Effect Transistor (CNTFET) has proved to be a promising different to conventional CMOS style due to the better electrostatic control and high mobility. The project presents a unique style of 10 Transistor ternary memory cell, with separate scan and write lines. Extensive HSPICE simulations have validated the scan-write functionality of the planning. Besides a vital reduction in transistor count, results show a minimum of forty fivepercent reduction in delay as compared to prevalent memory cell styles.

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