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PROJECT TITLE :Low-Complexity VLSI Design of Large Integer Multipliers for Fully Homomorphic Encryption - 2018ABSTRACT:Giant integer multiplication has been widely employed in fully homomorphic encryption (FHE). Implementing possible
PROJECT TITLE :High Performance Integer DCT Architectures For HEVC - 2017ABSTRACT:This paper proposes an efficient VLSI design for integer discrete cosine remodel (integer DCT) that is utilized in real time high potency video
PROJECT TITLE :A Bit plane Decomposition Matrix Based VLSI Integer Transform Architecture for HEVC - 2017ABSTRACT:In this brief, a new very-giant-scale integrated (VLSI) integer remodel architecture is proposed for the High Potency
PROJECT TITLE : Efficient Implementation of Scan Register Insertion on Integer Arithmetic Cores for FPGAs - 2016 ABSTRACT: Scan flip -- flop insertion for aiding design for testability invitations additional hardware overhead,
PROJECT TITLE: Efficient Integer DCT Architectures for HEVC - 2014 ABSTRACT: In this project, we present area- and power-efficient architectures for the implementation of integer discrete cosine transform (DCT) of different lengths

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