This paper presents a simple analytical model for predicting on-chip cache hierarchy effectiveness in chip multiprocessors (CMP) for a state-of-the-art architecture. Given the complexity of this type of systems, we use rough approximations, such as the empirical observation that the re-reference timing pattern follows a power law and the assumption of a simplistic delay model for the cache, in order to provide a useful model for the memory hierarchy responsiveness. This model enables the analytical determination of average access time, which makes design space pruning useful before sweeping the vast design space of this class of systems. The model is also useful for predicting cache hierarchy behavior in future systems. The fidelity of the model has been validated using a state-of-the-art, full-system simulation environment, on a system with up to sixteen out-of-order processors with cache-coherent caches and using a broad spectrum of applications, including complex multithread workloads. This simple model can predict a near-to-optimal, on-chip cache distribution while also estimating how future system running future applications might behave.

Did you like this research project?

To get this research project Guidelines, Training and Code... Click Here

PROJECT TITLE : Modulated Model Predictive Control for Modular Multilevel ACAC Converter ABSTRACT: Due to its appealing properties, the modular multilevel converter (MMC) is highly common in high power applications. The full
PROJECT TITLE : A Fuzzy Logic Based Switching Methodology for a Cascaded H-Bridge Multilevel Inverter ABSTRACT: Fuzzy logic is used to construct a novel switching method in this letter. Conventional logic-gate design is eliminated
PROJECT TITLE : Family of Multiport Switched-Capacitor Multilevel Inverters for High Frequency AC Power Distribution ABSTRACT: In order to distribute high-frequency ac power, this study offers a variety of SCMLI (switched-capacitor
PROJECT TITLE : Enhanced Frequency Regulation Using Multilevel Energy Storage in Remote Area Power Supply Systems ABSTRACT: RAPS systems with a high percentage of renewable power generation require frequency assistance from
PROJECT TITLE : A Multilevel Transformerless Inverter employing Ground Connection between PV Negative ABSTRACT: The issue of common mode (CM) leakage current must be handled carefully for the safe operation of transformerless

Ready to Complete Your Academic MTech Project Work In Affordable Price ?

Project Enquiry