PROJECT TITLE :

An Overview of Static Pipelining

ABSTRACT:

A new generation of mobile applications needs reduced energy consumption while not sacrificing execution performance. In this paper, we have a tendency to propose to retort to these conflicting demands with an innovative statically pipelined processor supported by an optimizing compiler. The central idea of the approach is that the management throughout every cycle for each portion of the processor is explicitly represented in each instruction. Thus the pipelining is in result statically determined by the compiler. The benefits of this approach include easier hardware and that it permits the compiler to perform optimizations that are not possible on traditional architectures. The initial results indicate that static pipelining will significantly reduce power consumption without adversely affecting performance.


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