PROJECT TITLE :
Topology Error and Bad Data Processing in Generalized State Estimation
This paper presents a methodology for processing real-time data error in generalized state estimation (GSE). Attention is concentrated on the 2 main types of error: network topology errors and dangerous knowledge on analog measurements. The proposed approach is ready to handle each errors while not making any previous assumption regarding the character of those errors. The degrading effects of topology errors over unhealthy information processing when each topology and measurement errors occur at the identical time are evaluated and new strategy is proposed to overcome it. GSE is treated as a constrained optimization problem where measurements and circuit-breaker status are modeled as equality constraints. Geometric tests primarily based on the geometric interpretation of the Lagrange multiplier vector are then utilized to determine the source of the error. The proposed strategy is tested on 2 model power networks represented at the bus-section level that comes from the IEEE 30-bus and 118-bus systems.
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