Analysis and Design of the Classical CMOS Schmitt Trigger in Sub threshold Operation - 2017


In this paper, the classical CMOS Schmitt trigger (ST) operating within the subthreshold regime is analyzed. The complete DC voltage transfer characteristic of the CMOS ST is determined. The metastable phase of the characteristic is explained in terms of the negative resistance of the NMOS and PMOS subcircuits of the ST. Little-signal analysis is disbursed to determine the minimum provide voltage at which the hysteresis appears and to obtain a rough estimation of the hysteresis width. It's shown that the theoretical minimum offer voltage needed to obtain hysteresis is 2ln(two + v5)kT/q = seventy five mV at room temperature. A test chip with CMOS Schmitt triggers was designed and fabricated during a 180 nm technology so as to study their operation at offer voltages between 50 mV and 1000 mV.

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