Design And Synthesis Of Combinational Circuits Using Reversible Decoder In Xilinx - 2017

PROJECT TITLE :

Design And Synthesis Of Combinational Circuits Using Reversible Decoder In Xilinx - 2017

ABSTRACT:

Reversible logic is that the rising field for research in present era. The aim of this paper is to understand completely different types of combinational circuits like full-adder, full-subtractor, multiplexer and comparator using reversible decoder circuit with minimum quantum price. Reversible decoder is designed using Fredkin gates with minimum Quantum value. There are several reversible logic gates like Fredkin Gate, Feynman Gate, Double Feynman Gate, Peres Gate, Seynman Gate and many a lot of. Reversible logic is defined because the logic in which the number output lines are equal to the quantity of input lines i.e., the n-input and k-output Boolean function F(X1, X2, X3,..., Xn) (called (n, k) function) is claimed to be reversible if and only if (i) n is equal to k and (ii) every input pattern is mapped uniquely to output pattern. The gate must run forward and backward that's the inputs can conjointly be retrieved from outputs. When the device obeys these two conditions then the second law of thermo-dynamics guarantees that it dissipates no heat. Fan-out and Feed-back are not allowed in Logical Reversibility. Reversible Logic owns its applications in numerous fields which embrace Quantum Computing, Optical Computing, Nano-technology, Computer Graphics, low power VLSI Etc., Reversible logic is gaining its own importance in recent years largely thanks to its property of low power consumption. The comparative study in terms of garbage outputs, Quantum Value, numbers of gates are also presented. The Circuit has been implemented and simulated using Xilinx software.

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