PROJECT TITLE :
Area-Delay-Power-Aware Adder Placement Method for RNS Reverse Converter Design - 2016
Residue number systems (RNS) are an attractive different to conventional weighted range systems for today applications, because of features like parallelism and low-power consumption. But, a necessity for cashing in on these features is to own a suitable design for reverse converters. This paper proposes a sensible adder placement methodology to attain reverse converters with the required characteristics primarily based on the target application's requirements and constraints. The presented area-delay-power-aware adder placement technique breaks down into four phases. Besides, a linear efficiency function specified for RNS is introduced to settle on design with the best trade-off between circuit parameters. The effectiveness of the proposed placement methodology is experimentally assessed.
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