Voltage mode implementation of highly accurate analog multiplier circuit - 2015


A new four-quadrant multiplier circuit is presented in this project. Compared to the corresponding already published works, the accuracy of the circuit also as the linearity performance is significantly improved. DC transfer characteristic of the circuit shows the nonlinearity error of one.1percent over a considerable range of the inputs. The performance of the circuit, in terms of the conceivable mismatch in trans-conductance parameter and threshold voltage are completely analyzed. The circuit is simulated using HSPICE with TSMC level 49 (BSIM3v3) parameters for 0.eighteen µm CMOS technology, where under offer voltage of 1.8 V the -three dB bandwidth of the proposed circuit is one.45 GHz and the whole harmonic distortion at one MHz, remains as low as zero.four percent.

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