On the Systematic Creation of Faithfully Rounded Truncated Multipliers and Arrays - 2014

PROJECT TITLE:

On the Systematic Creation of Faithfully Rounded Truncated Multipliers and Arrays - 2014

ABSTRACT:

It is always necessary to return a faithfully rounded result when performing mounted-purpose multiplication, i.e. the machine representable variety, either immediately above or below the arbitrary precision result, if the latter is not exactly representable. Faithfully rounded multipliers use substantially less silicon space compared to correctly rounded multipliers, i.e., those returning the nearest machine representable range, often by introducing a truncation theme among the partial product collection. There are a variety of such heuristically influenced systems in the literature, but their use in industrial applications is hindered by the lack of verification, and exhaustive simulation is typically difficult, e.g. 264 simulations are necessary for a 32 bit multiplier. We tend to present 3 truncated multiplier schemes which subsume the bulk of existing schemes and derive the necessary and adequate conditions for dedicated rounding of both closed forms. We provide closed-type expressions for the bit vectors for 2 of the schemes, giving rise to the worst-case error and thus the probability of encountering these inputs during the Monte-Carlo simulation. From these expressions, we demonstrate how it is possible to build HDL code that performs faithfully rounded multiplication correct-by-construction. We also prefer to add a method for truncating an arbitrary array while retaining trustworthy rounding, generating in the method two new truncated multiplier schemes.

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