DDR3 based lookup circuit for high-performance network processing ABSTRACT: Double Data Rate (DDR) SDRAMs have been prevalent in the PC memory market in recent years and are widely used for NetWorking systems. These memory devices are rapidly developing, with high density, high memory bandwidth and low device cost. However, because of the high-speed interface technology and complex instruction-based memory access control, a specific purpose memory controller is necessary for optimizing the memory access trade off. In this paper, a specific purpose DDR3 controller for high-performance table lookup is proposed and a corresponding lookup circuit based on the Hash-CAM approach is presented. Did you like this research project? To get this research project Guidelines, Training and Code... Click Here facebook twitter google+ linkedin stumble pinterest Design of AES (Advanced Encryption Standard) Encryption and Decryption Algorithm with 128-bits Key Length Multiplication Acceleration Through Twin Precision