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High-Performance and High-Yield 5 nm Underlapped FinFET SRAM Design using P-type Access Transistors - 2015

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PROJECT TITLE:

High-Performance and High-Yield 5 nm Underlapped FinFET SRAM Design using P-type Access Transistors - 2015

ABSTRACT:

During this project, totally different characteristics of SRAM cells based on five nm underlapped FinFET technology are studied. For the cell structures, that create use of P kind access transistors and pre-discharging bitlines to “0” during the read operation, the scan current and write margin (WM) are improved. In addition, 8T structures with less underlap for write access transistors are advised. These structures might have P or N type write access transistor (denoted by 8T-P or 8T-N, respectively). In these structures, using additional underlap for the pull down (pull up) transistors of the structures with the P kind (N sort) access transistors and doubling the fins of the write access transistor may improve the WM considerably while not any adverse effect on the scan SNM. The results of HSPICE simulations show concerning fiftypercent improvement for the write margin. Also, the consequences of the method variation on numerous characteristics are investigated. It is revealed that the proposed 8T-P incorporates a WM cell sigma over six for offer voltages as low as 0.twenty five V.


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High-Performance and High-Yield 5 nm Underlapped FinFET SRAM Design using P-type Access Transistors - 2015 - 4.8 out of 5 based on 49 votes

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