Opportunities and Challenges of Using Plasmonic Components in Nanophotonic Architectures PROJECT TITLE :Opportunities and Challenges of Using Plasmonic Components in Nanophotonic ArchitecturesABSTRACT: Nanophotonic architectures have recently been proposed as a path to providing low latency, high bandwidth network-on-chips. These proposals have primarily been based on micro-ring resonator modulators which, whereas capable of operating at tremendous speed, are known to possess each a high producing induced variability and a high degree of temperature dependence. The most common solution to these 2 problems is to introduce little heaters to regulate the temperature of the ring directly, that will significantly cut back overall power efficiency. During this paper, we introduce plasmonics as a complementary technology. While plasmonic devices have several important benefits, they come with their own new set of restrictions, as well as propagation loss and lack of wave division multiplexing (WDM) support. To overcome these challenges we propose a brand new hybrid photonic/plasmonic channel that can support WDM through the employment of photonic micro-ring resonators as variation tolerant passive filters. Our aim is to take advantage of the best of each technologies: wave-guiding of photonics, and modulating using plasmonics. This channel provides moderate bandwidth with distance independent power consumption and a better degree of temperature and process variation tolerance. We have a tendency to describe the state of plasmonics analysis, present architecturally-useful models of the many of the foremost necessary devices, explore new ways in which in which the constraints of the technology can most readily be minimized, and quantify the applicability of these novel hybrid schemes across a selection of interconnect strategies. Our link-level analysis shows that the hybrid channel will save from twenty eightp.c to 45percent of total channel energy-price per bit depending on process variation conditions. Did you like this research project? To get this research project Guidelines, Training and Code... Click Here facebook twitter google+ linkedin stumble pinterest A Low Energy Network-on-Chip Fabric for 3-D Multi-Core Architectures Designing Chip-Level Nanophotonic Interconnection Networks