My Account | Careers | Downloads | Blog

PROJECT TITLE :

A Low Energy Network-on-Chip Fabric for 3-D Multi-Core Architectures

ABSTRACT:

During this paper, we study the network-on-chip (NoC) implemented with new vertical slit field effect transistors (VeSFETs). The distinctive properties of VeSFET circuits enable for very economical power saving techniques that are not potential in complementary metal–oxide–semiconductor-primarily based homogeneous 3-D NoCs. We demonstrate that the proposed three-D hybrid architecture shows vital improvements in all network parameters including latency, power, and energy consumption compared to different practical three-D NoCs.


Did you like this research project?

To get this research project Guidelines, Training and Code... Click Here

PROJECT TITLE : Scheduling Real-Time Parallel Applications in Cloud to Minimize Energy Consumption ABSTRACT: The concept of cloud computing has emerged as an important paradigm in recent years. Cloud computing enables users to
PROJECT TITLE : Near-Optimal Energy-Efficient Algorithm for Virtual Network Function Placement ABSTRACT: Network Function Virtualization, or NFV, is a relatively new networking technology that was developed in the hope that it
PROJECT TITLE : Spectrum and Energy-Efficiency Maximization in RIS-Aided IoT Networks ABSTRACT: It is anticipated that new device capabilities will drive the evolution of fifth-generation (5G) and beyond networks. These capabilities
PROJECT TITLE : DE-SEP: Distance and Energy Aware Stable Election Routing Protocol for Heterogeneous Wireless Sensor Network ABSTRACT: Sensing technology has undergone a revolution as a result of technological advancements,
PROJECT TITLE : ICIC: A Dual Mode Intra-Cluster and Inter-Cluster Energy Minimization Approach for Multihop WSN ABSTRACT: In the process of designing a wireless sensor network, one of the most important concerns is reducing

Ready to Complete Your Academic MTech Project Work In Affordable Price ?

Project Enquiry