PROJECT TITLE :

EMD-Based Electrocardiogram Delineation for a Wearable Low-Power ECG Monitoring Device

ABSTRACT:

A novel algorithm for subtracting the artifacts from an electrocardiogram (ECG) signal and detecting the QRS complex based on empirical mode decomposition has been designed, tested, and evaluated. This method can remove both the noise of the power line interference and baseline wander from the ECG signal with minimum distortion, and R peaks can be exactly detected. The method is tested and evaluated using the records from the MIT-BIH arrhythmia database and the ECG signal data acquired from a wearable low-power ECG monitoring device. In the experiments, the correlation coefficient between the clean signal and denoised signal can be up to 0.997, and it is greater than 0.970 even in severely contaminated situations. The detection algorithm for the wearable monitoring device shows that the QRS detection rate is over 99.8% and that the sensitivity is over 99.9%. When compared with other detection methods, this proposed algorithm holds the best performance in severely noise-contaminated situations. The experiment's results demonstrate that the algorithm can effectively delineate the ECG signal under different sampling rates as expected.


Did you like this research project?

To get this research project Guidelines, Training and Code... Click Here


PROJECT TITLE: Low-power, high-speed dual modulus prescalers based on branch-merged true single-phase clocked scheme - 2015 ABSTRACT: A brand new style theme meant to boost the performance of true single-part clocked (TSPC) twin
PROJECT TITLE :A Wide-Range, Low-Power, All-Digital Delay-Locked Loop With Cyclic Half-Delay-Line ArchitectureABSTRACT:A 3 MHz-to-1.eight GHz, 94 μW-to-nine.5 mW, all-digital delay-locked loop (ADDLL) using 65-nm CMOS technology
PROJECT TITLE :Low-power, parasitic-insensitive interface circuit for capacitive microsensorsABSTRACT:Capacitive transduction is ubiquitously employed at macro- and particularly micro-scales because of their simple structure and
PROJECT TITLE: Low-power, high-speed dual modulus prescalers based on branch-merged true single-phase clocked scheme - 2015 ABSTRACT: A brand new style theme meant to boost the performance of true single-part clocked (TSPC) twin
PROJECT TITLE : Security Analysis of Handover Key Management in 4G LTESAE Networks - 2014 ABSTRACT: The goal of 3GPP Long Term Evolution/System Architecture Evolution (LTE/SAE) is to move mobile cellular wireless technology

Ready to Complete Your Academic MTech Project Work In Affordable Price ?

Project Enquiry