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Computer Architecture Letters

Computer Architecture Letters focuses on the areas of uniprocessor and multiprocessors computer systems, computer architecture, micro architecture, workload characterization, performance evaluation and simulation techniques, and power-aware computing. There has been going a rigorous research work going on these concepts and attained a high-impact results in these areas. We provide the real time projects on these topics for the students of Mtech, PhD and researchers.

S.No Project Titles Abstract
26 Toward energy-efficient cloud computing: Prediction, consolidation, and overcommitment Abstract
27 Remained p-GaN effect to turn-off energy loss (Eoff) in p-GaN gate power devices Abstract
28 Improper Signaling for Symbol Error Rate Minimization in -User Interference Channel Abstract
29 Time-Division Multiplexing for Testing DVFS-Based SoCs Abstract
30 PHEVs Bidirectional Charging/Discharging and SoC Control for Microgrid Frequency Stabilization Using Multiple MPC Abstract
31 Reversible Color Spaces without Increased Bit Depth and Their Adaptive Selection Abstract
32 Exploring Data-Level Error Tolerance in High-Performance Solid-State Drives Abstract
33 Architecting Flash-based Solid-State Drive for High-performance I/O Virtualization Abstract
34 Soft Failures in Large Datacenters Abstract
35 An Overview of Static Pipelining Abstract
36 A Case for Hybrid Discrete-Continuous Architectures Abstract
37 Cache Impacts of Datatype Acceleration Abstract
38 A HW/SW Co-designed Programmable Functional Unit Abstract
39 Atomic Streaming: A Framework of On-Chip Data Supply System for Task-Parallel MPSoCs Abstract
40 A High-Level Power Model for MPSoC on FPGA Abstract
41 Multilevel Cache Modeling for Chip-Multiprocessor Systems Abstract
42 Heterogeneity in “Homogeneous” Warehouse-Scale Computers: A Performance Opportunity Abstract
43 On Supporting Rapid Thermal Analysis Abstract
44 Packet Chaining: Efficient Single-Cycle Allocation for On-Chip Networks Abstract
45 Experience with Improving Distributed Shared Cache Performance on Tilera's Tile Processor Abstract
46 Exploring the Interaction Between Device Lifetime Reliability and Security Vulnerabilities Abstract
47 Fault-Tolerant Vertical Link Design for Effective 3D Stacking Abstract

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Disclaimer : MTech Projects, is not associated or affiliated with IEEE, in any way. The mentioned IEEE Projects here are student projects inspired by ideas from IEEE publications, not projects conducted by or associated with IEEE.

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