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  3. Computer Architecture Letters
  4. Exploring Data-Level Error Tolerance in High-Performance Solid-State Drives
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Category: Computer Architecture Letters
By MTech Projects
MTech Projects
15.May
Hits: 8

Exploring Data-Level Error Tolerance in High-Performance Solid-State Drives

PROJECT TITLE :

Exploring Data-Level Error Tolerance in High-Performance Solid-State Drives

ABSTRACT:

Flash storage systems have exhibited nice advantages over magnetic laborious drives like low input-output (I-O) latency, and high throughput. However, NAND flash primarily based Solid-State Drives (SSDs) are inherently susceptible to soft errors from varied sources, e.g., wear-out, program and read disturbance, and hot-electron injections. To deal with this issue, flash devices employ totally different error-correction codes (ECC) to detect and proper soft errors. Using ECC induces non-trivial overhead prices in terms of flash space, performance, and energy consumption. In this work, we evaluate the feasibility of reducing the requirement for sturdy ECC whereas maintaining the correct execution of the applications. Specifically, we have a tendency to explore information-level error tolerance in various data-centric applications, and study the system implications for coming up with a low-cost nevertheless high performance flash storage system, SoftFlash. We tend to explore 3 key aspects of enabling SoftFlash. Initial, we tend to style a mistake modeling framework that can be utilized in runtime for monitoring and estimating the error rates of real-world flash devices. Our experiments show that the error rate of SSDs can be modeled with reasonable accuracy (13%) using parameters accessible from operating systems. Second, we have a tendency to perform extensive fault-injection experiments on a wide range of applications as well as multimedia, scientific computation, and cloud computing to understand the necessities and characteristics of information level error tolerance. We realize that the info from these applications show high error resiliency, and can manufacture acceptable results even with high error rates. Third, we have a tendency to conduct a case study to point out the advantages of leveraging data-level error tolerance in flash devices. Our results show that, for several data-centric applications, the proposed SoftFlash system can achieve acceptable results (or higher in certain cases), with additional than a fortypercent performance improvement, and a third of the energy consumption.

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Previous article: Reversible Color Spaces without Increased Bit Depth and Their Adaptive Selection Reversible Color Spaces without Increased Bit Depth and Their Adaptive Selection Next article: Architecting Flash-based Solid-State Drive for High-performance I/O Virtualization Architecting Flash-based Solid-State Drive for High-performance I/O Virtualization
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