Flexible ECC Management for Low-Cost Transient Error Protection of Last-Level Caches - 2016


The traditional error correcting code (ECC) schemes for caches are primarily based on a fastened mapping between cache information words and ECC check bits, and fastened ECC word granularity. This ends up in inefficient usage of the ECC check bits. We propose to manage the check bits flexibly for low-value error protection of last-level caches. The proposed ECC schemes work at the word level, whereas the conventional ECC schemes work at the cache line or set level. The proposed schemes defend only dirty words with ECC check bits employing a flexible mapping. Moreover, the proposed schemes utilize variable ECC word granularities. Dirty (modified) words that are unlikely to be changed additional before being evicted are collectively protected with a larger ECC word granularity. The proposed schemes cut back DRAM and knowledge bus energy overheads by 28% and forty fivepercent, respectively, with the identical area overhead as previously proposed competitive schemes. Our schemes show more energy reduction results for multicore systems without noticeable performance degradation.

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