A High-Performance FIR Filter Architecture forFixed and Reconfigurable Applications - 2016


Transpose type finite-impulse response (FIR) filters are inherently pipelined and support multiple constant multiplications (MCM) technique that leads to important saving of computation. However, transpose form configuration does in some way support the block processing not like direct-kind configuration. In this project, we tend to explore the possibility of realization of block FIR filter in transpose kind configuration for space-delay efficient realization of huge order FIR filters for each mounted and reconfigurable applications. Primarily based on an in depth computational analysis of transpose type configuration of FIR filter, we tend to have derived a flow graph for transpose kind block FIR filter with optimized register complexity. A generalized block formulation is presented for transpose kind FIR filter. We tend to have derived a general multiplier-based architecture for the proposed transpose type block filter for reconfigurable applications. A low-complexity style using the MCM scheme is additionally presented for the block implementation of fastened FIR filters. The proposed structure involves considerably less space-delay product (ADP) and fewer energy per sample (EPS) than the present block implementation of direct-kind structure for medium or massive filter lengths, whereas for the short-length filters, the block implementation of direct-type FIR structure has less ADP and less EPS than the proposed structure. Application-specific integrated circuit synthesis result shows that the proposed structure for block size 4 and filter length sixty four involves forty two% less ADP and 40p.c less EPS than the simplest available FIR filter structure proposed for reconfigurable applications. For the same filter length and the same block size, the proposed structure involves thirteenp.c less ADP and twelve.8percent less EPS than that of the present direct-type block FIR structure.

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