A Low Complexity Multiple Error Correcting Architecture Using Novel Cross Parity Codes Over GF(2m) - 2014
This project presents a novel low-complexity cross parity code, with a wide selection of multiple bit error correction capability at a lower overhead, for improving the reliability in circuits over GF(2m). For an m input circuit, the proposed scheme will correct m = Dw = 3m/two -one multiple error combos out of all the potential 2m - one errors, that is superior to many existing approaches. From the mathematical and practical evaluations, the most effective case error correction is m/a pair of bit errors. Tests on 80-bit parallel and, for the primary time, on 163-bit Federal Data Processing Customary/National Institute of Standards and Technology (FIPS/NIST) commonplace word-level Galois field (GF) multipliers, suggest that it needs solely 106% and 170percent space overheads, respectively, which is not up to the prevailing approaches, whereas error injection-based mostly behavioral analysis demonstrates its wider error correction capability.
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