Analysis of Faults in Multi-Terminal HVDC Grid for Definition of Test Requirements of HVDC Circuit Breakers - 2017


This paper provides a detailed analysis of the temporal development of fault currents in a very multiterminal high-voltage direct-current (MT-HVDC) grid composed of a bipolar converter configuration. The sequence of events following the incidence of a pole-to-ground fault is identified, divided into three distinct periods; specifically, submodule capacitor discharge, arm current decay, and ac in-feed periods. The essential parameters that have a important impact on the fault current in each period are mentioned. The impacts of various parameters of the HVDC grid such as the dimensions of the current limiting reactor, ac grid strength, also the placement of the fault within the grid are studied through PSCAD/EMTDC simulation. Then, a fault current interruption process using models of varied HVDC circuit breaker technologies and also the ensuing stresses are studied. Both function important inputs to define test procedures. It is found that the HVDC circuit breakers are subjected to not solely dc current and voltage stresses but also energy stress. These stresses are translated into check necessities.

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