Design of low power and high speed Carry Select Adder using Brent Kung adder - 2015 PROJECT TITLE: Design of low power and high speed Carry Select Adder using Brent Kung adder - 2015 ABSTRACT: During this project, Carry Select Adder (CSA) architectures are proposed using parallel prefix adders. Rather than using twin Ripple Carry Adders (RCA), parallel prefix adder i.e., Brent Kung (BK) adder is used to design Regular Linear CSA. Adders are the essential building blocks in digital integrated circuit based designs. Ripple Carry Adder (RCA) offers the most compact design but takes longer computation time. The time essential applications use Carry Look-ahead scheme (CLA) to derive quick results but they lead to increase in area. Carry Choose Adder is a compromise between RCA and CLA in term of space and delay. Delay of RCA is large thus we have a tendency to have replaced it with parallel prefix adder that gives quick results. In this project, structures of 16-Bit Regular Linear Brent Kung CSA, Modified Linear BK CSA, Regular Square Root (SQRT) BK CSA and Modified SQRT BK CSA are designed. Power and delay of all these adder architectures are calculated at totally different input voltages. The results depict that Modified SQRT BK CSA is best than all the opposite adder architectures in terms of power but with small speed penalty. The designs are synthesized at 45nm technology using Tanner EDA tool. Did you like this research project? To get this research project Guidelines, Training and Code... Click Here facebook twitter google+ linkedin stumble pinterest Energy-Efficient Approximate Multiplication for Digital Signal Processing and Classification Applications - 2015 Design of area and power efficient digital FIR filter using modified MAC unit - 2015