PROJECT TITLE :
Pixel-Parallel 3-D Integrated CMOS Image Sensors With Pulse Frequency Modulation A/D Converters Developed by Direct Bonding of SOI Layers
We have developed for the primary time a three-D integrated CMOS image sensor with pixel-parallel analog-to-digital converters (ADCs). Photodiode (PD) and inverter layers are ready on separate silicon-on-insulator layers and directly bonded with damascened Au electrodes. The handle layer is then removed by grinding and XeF2 vapor phase etching to expose the PD surface. The developed method is appropriate for pixelwise interconnection as a result of it allows the damascened Au electrodes to be 1 μm in diameter or less. An ADC circuit is meant based mostly on pulse frequency modulation where pulses are generated proportional to the illumination intensity, and contains a PD, inverters, a reset transistor, and counters. A prototype 3-D integrated CMOS image sensor is additionally developed with 64 pixels, that acquires video images without pixel defects. A large dynamic range of >80 dB is confirmed for the incident lightweight intensity. The experimental results demonstrate the feasibility of pixel-level three-D integration for high-performance CMOS image sensors.
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