PROJECT TITLE :

Hybrid NRZ/Multi-Tone Serial Data Transceiver for Multi-Drop Memory Interfaces

ABSTRACT:

A 7.5 Gb/s mixed NRZ/multi-tone (NRZ/MT) transceiver for multi-drop bus (MDB) memory interfaces is meant and fabricated in forty nm CMOS technology. Reducing the complexity of the equalization circuitry on the receiver (RX) side, the proposed design achieves 1 pJ/bit link potency for an MDB channel with forty five dB loss at two.5 GHz. The transmitted spectrum is composed of baseband (BB) and i/Q sub-bands with the ability to match the modulation frequency of the whole transceiver (TRX) with respect to the channel response over a $pm 25%$ vary. A switched-capacitor-based mixer/filter is developed to efficiently down convert and equalize the I/Q sub-bands in the RX. The core size space is $85times 60; mu textm^2$ and $150times 60; mu textm^2$ for the TX and RX, respectively.


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