Self-Similar Magneto-Electric Nanocircuit Technology for Probabilistic Inference Engines


Probabilistic graphical models are powerful mathematical formalisms for machine learning and reasoning underneath uncertainty that are widely used for cognitive computing. However, they cannot be utilized efficiently for large problems (with variables within the order of 100K or larger) on conventional systems, thanks to inefficiencies resulting from layers of abstraction and separation of logic and memory in CMOS implementations. During this paper, we have a tendency to present a magnetoelectric probabilistic technology framework for implementing probabilistic reasoning functions. The technology leverages straintronic magneto-tunneling junction (S-MTJ) devices in a novel mixed-signal circuit framework for direct computations on chances whereas enabling in-memory computations with persistence. Initial evaluations of the Bayesian chance estimation operation occurring throughout Bayesian Network inference indicate up to 127× lower area, 214× lower active power, and 70× lower latency compared to an equivalent 45-nm CMOS Boolean implementation.

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