PROJECT TITLE :
Interface Trap Density Estimation in FinFETs Using the Method in the Subthreshold Regime
ABSTRACT:
During this paper, we show that the subthreshold current–voltage characteristic will be used for estimating the interface lure density as a function of the energy in fully depleted symmetric metal-oxide-semiconductor devices with a minimum amount of modeling. The method is analyzed using TCAD simulations, and illustrated with the measurements on n-type silicon-on-insulator FinFETs. The results indicate that the trap density can be extracted between $sim 0.sixty five$ and 0.90 eV. This range is limited by resolution problems at the lowest current levels, and by the transition from subthreshold to saturation behavior at the high current levels.
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