Design, Simulation, and Fabrication of 4H-SiC Power SBDs With SIPOS FP Structure

PROJECT TITLE :

Design, Simulation, and Fabrication of 4H-SiC Power SBDs With SIPOS FP Structure

ABSTRACT:

We tend to introduce a field plate (FP) termination structure utilizing semi-insulating polycrystalline silicon (SIPOS) as the dielectrics in 4H-SiC Schottky barrier diodes (SBDs) so as to relieve the electrical field enhancement at the junction corners and enhance the breakdown voltage of devices. In SIPOS FP structures, the maximum electric field $(E_M)$ among the dielectrics can be considerably reduced in reverse blocking states due to the SIPOS with the next dielectric constant $(k)$. Simulation and fabrication of 4H-SiC SBDs with the novel and traditional SiO2 FP were dole out. The simulations were performed using the industrial two-D device simulator DESSIS. Compared with a traditional SiO2 FP structure device, the optimal design of the new sort of SIPOS FP structure can cause a rise of 780 V in the breakdown voltage and a 44.8% $E_M$ reduction. From the experimental results, it has been proven that the new kind of SIPOS FP structure indeed relieves the utmost electrical field within the dielectric layer while simultaneously realizes an enhanced device breakdown voltage as high as 1630 V, that is about seventy four.5% of the perfect theoretical breakdown voltage.

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