Simplified Subspaced Regression Network for Identification of Defect Patterns in Semiconductor Wafer Maps

PROJECT TITLE :

Simplified Subspaced Regression Network for Identification of Defect Patterns in Semiconductor Wafer Maps

ABSTRACT:

Wafer defects, which are primarily defective chips on a wafer, are of the key challenges facing the semiconductor manufacturing corporations, as they might increase the yield losses to many ample greenbacks. Fortunately, these wafer defects leave unique patterns due to their spatial dependence across wafer maps. It's therefore doable to identify and predict them in order to search out the purpose of failure within the producing method accurately. This paper introduces a unique simplified subspaced regression framework for the correct and efficient identification of defect patterns in semiconductor wafer maps. It will achieve a test error love or better than the state-of-the-art machine-learning (ML)-based mostly methods, while maintaining an occasional computational price when dealing with giant-scale wafer information. The effectiveness and utility of the proposed approach has been demonstrated by our experiments on real wafer defect datasets, achieving detection accuracy of 99.884% and $R^2$ of 99.905%, that are so much higher than those of any existing strategies reported within the literature.

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