Flexible Biometric Online Speaker-Verification System Implemented on FPGA Using Vector Floating-Point Units


This paper presents the implementation of a speaker-verification system on field programmable gate array. The algorithm is executed by software over an embedded system that has a MicroBlaze microprocessor connected to a vector floating-point unit (VFPU). The VFPU is meant to hurry up the resolution of any vector floating-purpose operation involved in the verification algorithm, whereas the microprocessor manages the control of the method and executes the remainder of operations. With a clock frequency of forty MHz, the system is capable of executing the complete algorithm in real time, processing a voice frame in 9.1 ms. The identical verification method was administered for 2 different systems: 1) an ARM Cortex A8 microprocessor; and a pair of) configuring MicroBlaze with the scalar floating-point unit provided by Xilinx. The experimental results show that when comparing our proposed system against each systems, the amount of clock cycles is reduced by a factor of 11.a pair of× and 15.4×, respectively. The main advantage of the VFPU is its flexibility, which allows fast adaptation of the software to the potential changes made in each the system and the user requirements. The algorithm was tested over a public database that contains the utterances of various users acquired below totally different environmental conditions, providing good recognition rates.

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